FPGA Implementation of Software Defined Radio-Based Flight Termination System


This paper proposes a field-programmable gate array (FPGA)-based software defined radio (SDR) implemented flight termination system (FTS). This is purely a new kind of implementation of digital FTS in SDR platform. The applied design procedure replaces a multiple platform-based system with a single platform. It also guarantees reconfigurable, interoperable, portable, and handy FTS, and maintains errorless, bug free, and reliable implementation. Real-time flight termination operation demands a very highly reliable and ruggedized platform. Hence, the FTS is implemented in FPGA. In order to minimize hardware resources and to enable future upgradation, efficient optimization technique has been applied. LabVIEW, a high-level programming language is used to simulate and implement the system in real time and enables rapid prototyping. The system was validated at subsystems level by measurements of different parameters in various intermediate stages of processing, and further was validated as an integrated system at real-time telecommunication operation environment.